Did you know, that Intel has a naming scheme for their SIMD instructions? Neither did I.
I found, by watching a CppCon talk by Tim Haines, that
SIMD instruction have a pre-defined scheme which can be used to easily decode the, sometimes, cryptic mnemonics.
To much of my surprise, it's not mentioned nor explained in any of Intel's manuals.
An instruction is composed of these parts:
PREFIX (Optional): Whether the instruction is AVX or SSE. Possible values: A[V]X, or left out
OPCODE: The operation to perform. Possible values: Any basic arithmetic instruction (e.g ADD/SUB/MUL), MOV
ALIGNMENT (Optional): The alignment requirements of the data, only applicable to a few instructions. Possible values: [A]ligned, [U]naligned
PACKING: Whether it's a packed operation or operation on a single scalar. Possible values: [P]acked, [S]calar
PRECISION: Whether it operates on single or double precision floats. Possible values: [S]ingle-Precision float, [D]ouble-Precision float
MOVAPD: [MOV][A][P][D]. [MOV]e [A]ligned [P]acked [D]ouble-Precision float
SUBSS: [SUB][S][S]. [SUB]tract [S]calar [S]ingle-Precision float
VMOVSS: [V][MOV][S][S]. A[V]X [MOV]e [S]calar [S]ingle-Precision float
This does only apply to a few basic instructions, namely the basic arithmetic and MOV instructions.
Many instructions, added later in SSE2/3/4 are very specialized, which can be applied vertically or horizontally, use non-temporal stores, etc.
Feedback, criticism? Tweet me at @ArvidGerstmann.